Comments on: Intel Crafts Broadwell Xeon D For Hyperscale https://www.nextplatform.com/2015/03/09/intel-crafts-broadwell-xeon-d-for-hyperscale/ In-depth coverage of high-end computing at large enterprises, supercomputing centers, hyperscale data centers, and public clouds. Mon, 23 Apr 2018 11:13:04 +0000 hourly 1 https://wordpress.org/?v=6.5.5 By: John D. McCalpin, Ph.D. https://www.nextplatform.com/2015/03/09/intel-crafts-broadwell-xeon-d-for-hyperscale/#comment-290 Sat, 28 Mar 2015 20:20:47 +0000 http://www.nextplatform.com/?p=326#comment-290 Minor quibble: The statement “Energy consumption and therefore the heat dissipated by chips rises exponentially with clock speed” is not accurate. The actual sensitivity depends on many details of the design, but for a fixed design the active power consumption typically depends (approximately) on the cube of the frequency. This is a combination of Voltage * Frequency^2 with a maximum frequency that is linearly increasing with voltage. My initial tests of power and performance on Intel Xeon E5 v3 (“Haswell EP”) processors is consistent with an active power model depending on frequency cubed for active processors and a very low idle power for inactive processors.

The cubic dependence of power on frequency does not change the overall architectural trend, but does have an impact on the specific frequencies attainable for various configurations. Intel has become increasingly adept at enabling their processors to run across a widening range of parameter space, from running all cores at relatively low frequencies to running 1-2 cores at increasing (relative) “Turbo boost” ratios.

]]> By: Timothy Prickett Morgan https://www.nextplatform.com/2015/03/09/intel-crafts-broadwell-xeon-d-for-hyperscale/#comment-48 Wed, 11 Mar 2015 21:49:17 +0000 http://www.nextplatform.com/?p=326#comment-48 In reply to Jim Cownie.

My dyslexia shows through. The clock goes “tick tock” and I do indeed think of microarchitecture first and process second, because one has to come before the other. Now I know to put a reversal on it. HA!

]]> By: ipso facto https://www.nextplatform.com/2015/03/09/intel-crafts-broadwell-xeon-d-for-hyperscale/#comment-30 Tue, 10 Mar 2015 13:42:12 +0000 http://www.nextplatform.com/?p=326#comment-30 Good reporting overall !
However, I noticed some inaccuracies (if I am not mistaken):
– “had dual fixed multiply add (FMA) unit”: FMA stands for Fused Multiply Add
– “six lanes of 12 Gb/sec SATA 3.0”: SATA is still capped at 6 Gb/s per lane
Regards

]]> By: Jim Cownie https://www.nextplatform.com/2015/03/09/intel-crafts-broadwell-xeon-d-for-hyperscale/#comment-28 Tue, 10 Mar 2015 09:12:03 +0000 http://www.nextplatform.com/?p=326#comment-28 You have “tick” and “tock” crossed over. I know what you said seems to make sense, but you must remember that Intel is a manufacturing company, and so the process change is more important than the micro-architecture. Therefore the “tick” is when the process changes, and the “tock” is when it doesn’t (but you have a new micro-architecture).

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