You’ll have seen that the two CEOs interact on LinkedIn with ‘likes’ since around the Telegraph story broke, just stating the facts.

I have not. But wouldn’t that be neat! Arm thinks I am being nuts or mean or both by suggesting it should have a beefy GPU/XPU.

The new CSS blocks appear to have UCIe chiplet interconnect also. An integrated Inference die via UCIe has lots of potential upside without Arm spreading their pragmatically limited budget even thinner. (UCIe is a bit of a dual edge sword because it could do big harm to Arms iGPU business also over the long term.) Arm has a substantively high number architecture license holders which are also a long term viability threat to CSS like products. Again a very high load on their limited R&D resource budget.

N3 cranks up AI/ML performance in some areas by 100%. Extremely likely they are targeting inference loads with very low latency tolerances rather then the training ‘bubble’ we are in right now. Long term, Inference is going to grow bigger than Training. It simply has more usable and privacy utility (value).

There seems to be a nice progression of performance core counts between A64FX at 48 cores, Rhea1 at 64 cores, Grace at 72 cores, Graviton4 at 96 cores, and now this V3 at 128 cores (2×64, out-of-the-box). As you suggest, a 4-die 256 core package might be possible if some DDR5 or I/O modules are replaced with Die-to-Die blocks, but then perf may suffer through memory bottleneck.

The big mystery though is where the AI uplift comes from (both V3’s near 100%, and N3’s near 200%). Are the vector units updated in a way that makes software better-able to use them, or did they just double-up on them, to “eight 128-bit vectors” for example? Maybe HBM3 (but only in the V3 then)?

In any instance, with so many countries wanting to have chip-making sovereignty after the recent supply-chain disruptions, seeing ARM make the performance V-series of the twelve cheeky Olympians more easy to integrate into one’s chip design is definitely a great thing in my view!