Comments on: IBM Chips In To Drive 2 Nanometer Semiconductor Manufacturing https://www.nextplatform.com/2021/05/06/ibm-chips-in-to-drive-2-nanometer-semiconductor-manufacturing/ In-depth coverage of high-end computing at large enterprises, supercomputing centers, hyperscale data centers, and public clouds. Mon, 17 May 2021 03:14:13 +0000 hourly 1 https://wordpress.org/?v=6.5.5 By: nanosheet curious https://www.nextplatform.com/2021/05/06/ibm-chips-in-to-drive-2-nanometer-semiconductor-manufacturing/#comment-162273 Sat, 08 May 2021 19:37:45 +0000 https://www.nextplatform.com/?p=138386#comment-162273 >>it stacks an NMOS transistor on top of a PMOS transistor instead of having them sit side by side

Can you highlight where this was said? I didn’t notice this claim from IBM. The photomicrograph seems to show a ‘traditional’ nanosheet transistor structure, with each of the three channels in the stack having the same gate.

As an historical aside, during the planar-transistor era the dimension in the node name described the channel length. IBM is coming clean here by acknowledging that its 2nM process implements 12nM channel length, hence a mere factor of six spec bloat.

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